Intel® Stratix® 10 FPGA 和 SoC FPGA
Intel® Stratix® 10 FPGA 和 SoC FPGA
其他資源
進一步探索 Altera® FPGA 裝置的相關內容,例如開發板、智慧財產、支援等。
產品與效能資訊
Comparison based on Stratix® V vs. Intel® Stratix® 10 using Intel® Quartus® Prime Pro 16.1 Early Beta. Stratix® V Designs were optimized using 3 step optimization process of Hyper-Retiming, Hyper-Pipelining, and Hyper-Optimization in order to utilize Intel® Stratix® 10 architecture enhancements of distributed registers in core fabric. Designs were analyzed using Intel® Quartus® Prime Pro Fast Forward Compile performance exploration tool. For more details, refer to Intel® Hyperflex™ FPGA Architecture Overview White Paper: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/wp/wp-01220-hyperflex-architecture-fpga-socs.pdf. Actual performance users will achieve varies based on level of design optimization applied. Tests measure performance of components on a particular test, in specific systems. Differences in hardware, software, or configuration will affect actual performance. Consult other sources of information to evaluate performance as you consider your purchase. For more complete information about performance and benchmark results, visit www.intel.com.tw/benchmarks.
根據 Intel 內部估計。
元件效能測試使用特定的電腦系統和特定測試。任何有關上述條件的變更均可能導致不同結果。考慮購買時,為了充分評估效能,請參考其他資訊來源。如需更完整的效能與效能標竿評測結果相關資訊,請造訪 www.intel.com/benchmarks。
Intel® 技術可能需要搭配啟用的硬體、軟體或服務啟動。
沒有產品或元件能提供絕對的安全性。
已估計或模擬出結果。您的成本和成果可能有所落差。
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